mutualhelper, thanks for letting the board know that my points yesterday about cache coherence weren't
off track.
This is from Rambus' blog:
<< “There are a number of recent developments in the industry that address modern HPC and data center bottlenecks like Near Data Processing, the use of accelerators and the adoption of FPGAs. These industry efforts are focusing on both the hardware and the software infrastructure that ultimately will allow applications to achieve large gains in performance and power efficiency,” he added. “[For example], the CCIX consortium is slated to focus on the development of a Cache Coherent Interconnect for Accelerators, [while] the Coherent Accelerator Processor Interface (CAPI) will help enable further system improvements by allowing programmers to choose the most appropriate processors and accelerators to coherently share data. [These] are just two of the many examples of industry efforts to address these bottlenecks.”>>
This was me yesterday: